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VLSICore deals with VLSI design on SoC / ASIC / FPGA design flows. It includes,

  • Digital Logic design, Full-Custom/Semi-Custom design.
  • Microprocessors, DSP, Telecom more.
  • Nano Technology: 90nm, 45nm and beyond.
  • Foundry: TSMC, UMC, CSM, IBM, Tower
  • Standard / IO Cell library preparation, Intellectual Property [Memories, SRAMs, DRAMs, PCI, USB, Audio/Video CODEC], VDSM/UDSM.
  • Verilog, PLI, VHDL, EDIF, System Verilog, SystemC
  • Design Entry, Simulation, Formal Verification, Synthesis.
  • Floorplanning, HF Net Synthesis, Placement, Clock Tree Synthesis, Routing, Physical Verification, RC Extraction, DFM, OPC, Tape-Out.
  • Shell, Perl, Tcl, Tk/Tix, Scheme, C/C++, API, ...
  • Analog design, SPICE, Simulation, RF, PLL, High Speed CMOS, MEMS, ...
  • DFM (Design for Manufacturing)
  • EDA: Synopsys, Cadence, Mentor, Magma, Xilinx, Altera, Atmel, ...
  • Open Source EDA tools, Open Source : ASIC design and technology.

Thursday, March 11, 2010

ESC Silicon Valley - San Jose, CA (April 26-29, 2010)

More info. & Register : http://bit.ly/esc4sj

ESC Silicon Valley - San Jose, CA (April 26-29, 2010)

Attend the next ESC which brings together system architects, design engineers, suppliers, analysts and media from across the globe. With 10,000 total attendees, it’s the largest and most prestigious annual engineering event in America. Participate in ESC, and you will meet with your customers, renew relationships, sell to pro...spects, attend press meetings, make announcements, and talk to partners – Only at ESC.

Keynote Speakers:

Dr. Michio Kaku
Theoretical Physicist, Bestselling Author and Science Popularizer

Richard Templeton
Chairman, President, Chief Executive Officer, Texas Instruments

Jason Wolf
Vice President, North America, Better Place

More info. & Register : http://bit.ly/esc4s

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