by Daniel Payne in Extraction tools
In SoC designs today parasitic extraction tools produce RC and sometimes L or S-parameter values for full-chip designs using either pattern-matching or equation-based techniques. It gets the job done for most digital designs however when you really need accuracy in your parasitics then you must consider something more accurate, namely a 3D field solver.
Source: http://www.chipdesignmag.com/payne/2009/12/09/3d-field-solvers-can-be-fast/
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